Place & Route Engineer


We seek an experienced place-and-route engineer to manage digital backend flows. The role requires interfacing digital front-end designers to understand the requirements that come from RTL synthesis and to be able to partition architectures to give inputs at the generation of rational floorplanning and to drive physical aspects early in the design cycle.
Responsibilities:
- Assure the deliverability of the main part of the chip;
- Taking care of P&R/STA flows and tools available in the latest industry;
- Meaning of the synthesis and capability to drive place and route of blocks through signoff flows including timing and physical verification.
- Drive Place & Route in chip-level and hierarchical physical implementation environment taking care of the floorplan.
- Continue interaction with RTL designers to resolve design issues on block closure and reach and assure power/performance/area targets.
Qualifications:
- Master’s degree in Electrical Engineering, Electronics Engineering or 3+ experience in the field;
- Experience in physical design flow including gate level netlist, floor planning, partitioning, power planning, placement, synthesis, clock & power distribution, timing closure and routing;
- Synthesis fundamentals;
- Timing analysis deep comprehension;
- Test bench development;
- DRC/LVS and parasitic extraction capability.
Soft skills
- We are looking for team players who focus on the outcome of the team above the individual needs, with respect and honest challenge.
- Within- and cross-team collaboration at the technical level.
- The ideal candidate should count on a “can-do attitude”, willing to solve any obstacle by himself. Self-starter and self-motivated.
• španielsky - C1 Skúsený používateľ
European Silicon Engineering Company, headquartered in Barcelona, Spain, aims to democratize the access to high performance compute Chips developing Systems on Chip based on Chiplet technology and the combination of RISC-V and compute acceleration for AI and HPC, everything interconnected with UCIe open interfaces.
Its technologies will provide a value in multiple fields as Artificial
Intelligence, Security and Privacy and Carbon Footprint Reduction. Willing to change the Silicon Industry and help to build a more sustainable world, where collaboration and openness are by default. Chips used in High Performance Computing, Autonomous Driving, Telecommunications, Personalized Medicine, Edge Computing and Cloud.
Ak vás ponuka zaujala, prosím pošlite svoj životopis v anglickom alebo španielskom jazyku na eures.seleccio.soc@gencat.cat a v kópii ho pošlite prostredníctvom ikony „Pošli životopis“. Do predmetu mailu uveďte nasledovné: ID.EURES 7171765, Place & Route Engineer, Reference 11581
EURES poradca: Ing. Alžbeta Kučerová, alzbeta.kucerova@upsvr.gov.sk